Cadence PCB Librarian Expert 庫文件管理和制作 培訓(xùn)教程

（內(nèi)部英文原版培訓(xùn)教程 ￥80）

        PCB Librarian Expert是Cadence原理圖和PCB設(shè)計中的庫文件制作和管理工具，該套教程是Cadence公司推出的關(guān)于PCB Librarian使用培訓(xùn)的內(nèi)部教材，共18個Lesson，394頁；詳細講解了PCB Librarian 庫文件管理、庫文件制作的具體過程，在教程的最后并以兩個工程實例詳細演示了原理圖庫文件和PCB封裝庫的制作；是Cadence原理圖設(shè)計的入門和提高最經(jīng)典教程；教程內(nèi)容簡介如下：
        
        Lesson 1: Introduction
        In this lesson, we will examine the relationship between design processes, tools, and library models; introduce the Library Management flow and the part creation tools; and discuss library structure.

        Lesson 2: Setting Up a Build Area
        In this lesson, we will Suggest a directory structure for building and testing parts.

        Lesson 3: The Symbol View
        In this lesson, we will define the schematic symbol graphics and properties.

        Lesson 4: The Chips View
        In this lesson, we will learn to define available package styles and logical-to- physical pin mapping. We will also show you how to specify the Allegro footprint.

        Lesson 5: The Part Table View
        In this lesson, We will show you how to use the part table view to customize part properties.

        Lesson 6: The Simulation View
        In this lesson, We will show you how to associate the part to a simulation model.

        Lesson 7: Testing the Part
        In this lesson, We will learn to use the new part in a simulated design flow.

        Lesson 8: Building a 74LCX373
        In this lesson, we will give a example about building a 74LCX373. we will Set up Part Developer for 100-mil pin centers, and create a single-section vectored pin part.

        Lesson 9: Building a 74LCX125
        In this lesson, we will give a example about building a 74LCX125. Here we will show you how to Create a multi-section part and how to use Concept to modify symbol graphics.

        Lesson 10: Building a Resistor Network
        In this lesson, we will build a part with both single- and multi-section versions with pin swapping capability. We will also use pin types that disable IO and load checking.

        Lesson 11: More Part Building
        In this lesson, we will: Create a new part from an existing one, Show Power and Ground pins on the symbol, Define NC pins, and Create a voltage symbol.

        Lesson 12: Advanced Skills
        In this lesson, we will: Create an asymmetrical part, Create a split part, Import text files, Perform part modifications and discuss revision controls, and Introduce library category files.

        Lesson 13:Pad Designer
        In this lesson, we will show you how to create Allegro padstacks.

        Lesson 14: Package Symbols
        In this lesson, we will create package symbols, and create a thermal relief flash symbol.

        Lesson 15: Package Wizard
        In this lesson, we will show you how to use the Package Symbol Wizard to create Allegro PCB package

        Lesson 16: Custom Padstacks
        In this lesson, we will: Create a shape symbol, Use the shape symbol in a custom padstack, Use the custom padstack in a package symbol. 

        Lesson 17: Mechanical Symbols
        In this lesson, we will show you how to create a board outline symbol.

        Lesson 18: Edge Connector
        In this lesson, we will show you how to create padstacks for an edge connector, and how to create an edge connector package symbol.

        Appendix A: Concept DSP Example
        The DSP device that is used as an example is the Texas Instruments TMS320C6211B. In looking at the TMS320C611B, it was decided to create a split part with three sections. The first two sections will have signal pins, and the third section will have the Power and Ground pins. It was also decided that the default position for power and ground pins would be changed so that the power pins would appear on the left side of the symbol and the ground pins would appear on the right side.

        Appendix B: Allegro BGA Example
        This appendix will give an example of creating a BGA footprint that is used by Texas Instruments with their TMS320C6211B device. This footprint pattern will have pin escape vias built into the symbol. Below is the relevant screen capture of the mechanical data from the TI datasheet, as well as an example of the finished Allegro package symbol.

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